The present invention generally relates to leadless packages for semiconductor devices, and more particularly to a bump design that eliminates solder creeping to the sidewalls of a device.
Leadless semiconductor device packages are gaining in popularity. Leadless packages do not have pins that extend outside the body of the device, thereby reducing the overall size of the semiconductor device. Instead, leadless devices typically connect externally through soldering pads or balls on one of their surfaces, which improves electric and thermal performance at the solder joint where the device is attached to a printed circuit board (PCB).
Leadless packages are especially useful in Wafer Level Chip Scale Packaging (WLCSP). Typically a WLCSP has external connection-like pads or solder balls formed on one of its surfaces before singulation. The resulting packaged device has a size not much larger than the semiconductor die itself. Semiconductor devices are placed in alignment with soldering pads of external circuits that already have solder printed thereon, and then reflowed to melt the solder to electrically and mechanically attach the devices to the external circuits. For WLCSP devices, when its bottom surface is placed facing the PCB, solder will creep to the sidewalls, which typically comprise silicon without any shielding. This creeped solder acts as electrical connections, such that the extension to the silicon sidewalls of the WLCSP device inevitably impacts the device itself, e.g., causing interference, leakage, etc. An additional protective mold layer on the sidewall may be included to prevent the leakage, but adding a protective mold layer requires additional processes and higher cost.